1. Field of the Invention
The method and apparatus of the present invention relates to a constraint solution technique and analog VLSI implementation of the same.
2. Art Background
There has been increasing interest recently in using analog VLSI for a variety of computational tasks. See, for example, Carver Mead, Analog VLSI and Neural Systems (Addison Wesley, 1989). Mead teaches that analog CMOS VLSI chips can be produced using standard digital CMOS VLSI processes instead of developing an entirely new manufacturing technology for producing analog VLSI chips. A key element in this strategy is to produce designs that are tolerant to device variations that are present in a digital VLSI production process.
Related research is focused on increasing the accuracy and precision of computation with analog VLSI and developing a design methodology for creating analog VLSI circuits which can be adjusted to perform the desired accuracy. See, for example, David Kirk, Kurt Fleischer, Alan Barr, and Lloyd Watts, "Constrained Optimization Applied to the Parameter Setting Problem for Analog Circuits," IEEE Neural Information Processing Systems, 1991 (NIPS 91), (Morgan Kaufman, 1991). These techniques make analog VLSI more tractable for quantitative computation. Although constraints can be determined using digital circuitry, there are distinct advantages achieved by implementing the circuit in analog VLSI. One advantage of analog VLSI is that it can be used to compute approximate solutions to problems very quickly, though some amount of accuracy and precision is traded for speed of computation. An analog circuit has the advantage of performing computations continuously and continually in real time in order to provide an effective solution. Furthermore, problems realized using digital circuitry, such as discretization and quantization errors are avoided.